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LTC6906 Micropower, 10kHz to 1MHz Resistor Set Oscillator in SOT-23
DESCRIPTIO U
V+ = 3.6V V+ = 2.25V 400 600 800 FREQUENCY (kHz) 1000 1200
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FEATURES

Supply Current: 12A at 100kHz <0.65% Frequency Accuracy (from 0C to 70C) Frequency Range: 10kHz to 1MHz One Resistor Sets the Oscillator Frequency Single Supply: 2.25V to 5.5V -40C to 125C Operating Temperature Range No Decoupling Capacitor Needed Start-Up Time Under 200s at 1MHz First Cycle After Power-Up is Accurate 150 CMOS Output Driver Low Profile (1mm) SOT-23 (ThinSOTTM) Package
The LTC(R)6906 is a precision programmable oscillator that is versatile, compact and easy-to-use. Micropower operation benefits portable and battery-powered equipment. At 100kHz, the LTC6906 consumes 12A on a 3.3V supply. A single resistor programs the oscillator frequency over a 10:1 range with better than 0.5% initial accuracy. The output frequency can be divided by 1, 3 or 10 to span a 100:1 total frequency range, 10kHz to 1MHz. The LTC6906 is easily programmed according to this simple formula:
APPLICATIO S

OUT
Low Cost Precision Programmable Oscillator Rugged, Compact Micropower Replacement for Crystal and Ceramic Oscillators High Shock and Vibration Environments Portable and Battery-Powered Equipment PDAs and Cellular Phones
10, DIV Pin = V + 1MHz 100k = * , N = 3, DIV Pin = Open N RSET 1, DIV Pin = GND
, LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
Micropower Clock Generator
POWER SUPPLY CURRENT (A)
NO DECOUPLING CAPACITOR NEEDED LTC6906 2.25V TO 3.6V /10 /3 /1 V+ GND DIV OUT GRD SET RSET 100k TO 1M
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No decoupling capacitor is needed in most cases, yielding an extremely compact solution occupying less than 20mm2. Contact LTC Marketing for a version of the part with a shutdown feature or lower frequency operation. The LTC6906 is available in the 6-lead SOT-23 (ThinSOT) package.
Typical Supply Current vs Frequency
90 80 70 60 50 40 30 20 10 0 0 200
10kHz TO 1MHz
CL = 5pF TA = 25C
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AXI U RATI GS
ABSOLUTE
PACKAGE/ORDER I FOR ATIO
TOP VIEW OUT 1 GND 2 DIV 3 6 V+ 5 GRD 4 SET
(Note 1) V + ................................................................- 0.3V to 6V DIV to GND .................................... - 0.3V to (V + + 0.3V) SET to GND ................................... - 0.3V to (V + + 0.3V) GRD to GND .................................. - 0.3V to (V + + 0.3V)
Operating Temperature Range (Note 7) LTC6906C .......................................... - 40C to 85C LTC6906I ............................................ - 40C to 85C LTC6906H ........................................ - 40C to 125C Specified Temperature Range (Note 7) LTC6906C ............................................... 0C to 70C LTC6906I ............................................ - 40C to 85C LTC6906H ........................................ - 40C to 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
S6 PACKAGE 6-LEAD PLASTIC TSOT-23
TJMAX = 150C, JA = 230C/W
ORDER PART NUMBER LTC6906CS6 LTC6906IS6 LTC6906HS6
S6 PART MARKING* LTBJN
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature range. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL f PARAMETER Frequency Accuracy (Notes 2, 3)
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. V+ = 2.25V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V+ = 2.7V to 3.6V 100kHz f 1MHz 100kHz f 1MHz, LTC6906C 100kHz f 1MHz, LTC6906I f = 1MHz, LTC6906H f = 100kHz, LTC6906H V+ = 2.25V 100kHz f 1MHz 100kHz f 1MHz, LTC6906C 100kHz f 1MHz, LTC6906I f = 1MHz, LTC6906H f = 100kHz, LTC6906H

MIN
TYP 0.25
MAX 0.5 0.65 1.3 1.3 2.2 0.7 0.85 1.3 1.3 2.2 1000
UNITS % % % % % % % % % % k %/C %/V % % % ppm/kHr
0.25

RSET f/T f/V
Frequency-Setting Resistor Range Frequency Drift Over Temp (Note 3) Frequency Drift Over Supply (Note 3) Timing Jitter (Note 4) RSET = 316k V+ = 2.25V to 3.6V, 100k RSET 1000k 1000k Pin 3 = Open, 100k RSET 1000k Pin 3 = 0V, 100k RSET 1000k Pin 3 = V+ Pin 3 = V +, 100k RSET
100 0.005 0.06 0.03 0.07 0.15 300
Sf DC V+ IS
Long-Term Stability of Output Frequency Duty Cycle Operating Supply Range (Note 8) Power Supply Current

45 2.25
50 12.5 10.0 78 60
55 3.6 18 15 100 80
RSET = 1000k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 100kHz) RSET = 100k, Pin 3 = 0V, RL = 10M (DIV = 1, fOUT = 1MHz)
V + = 3.6V V + = 2.25V V + = 3.6V V + = 2.25V

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ELECTRICAL CHARACTERISTICS
SYMBOL VIH VIL IDIV VOH PARAMETER High Level DIV Input Voltage Low Level DIV Input Voltage DIV Input Current (Note 5) High Level Output Voltage (Note 5)
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. V+ = 2.25V to 3.6V, CL = 5pF, Pin 3 = V + unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V+ = 3.6V V+ = 2.25V V+ = 3.6V V+ = 2.25V Pin 3 = V + Pin 3 = 0V V + = 3.6V V + = 2.25V VOL Low Level Output Voltage (Note 5) V + = 3.6V V + = 2.25V tr tf VGS OUT Rise Time (Note 6) OUT Fall Time (Note 6) GRD Pin Voltage Relative to SET Pin Voltage V + = 3.6V V+ = 2.25V V + = 3.6V V+ = 2.25V -10A IGRD 0.3A

MIN 3.1 2.05
TYP
MAX
UNITS V V
0.5 0.2 -2 3.40 2.80 2.15 1.75 1 -1 3.59 3.30 2.2 2.0 0.02 0.15 0.03 0.30 10 25 10 25 -10 10 0.2 0.8 0.1 0.5 2
V V A A V V V V V V V V ns ns ns ns mV
IOH = - 100A IOH = - 1mA IOH = - 100A IOH = - 1mA IOL = 100A IOL = 1mA IOL = 100A IOL = 1mA

Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Some frequencies may be generated using two different values of RSET. For these frequencies, the error is specified assuming that the larger value of RSET is used. Note 3: Frequency accuracy is defined as the deviation from the fOUT equation. Note 4: Jitter is the ratio of the peak-to-peak deviation of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Note 5: Current into a pin is given as a positive value. Current out of a pin is given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels. Note 7: The LTC6906C is guaranteed to meet specified performance from 0C to 70C. The LTC6906C is designed, characterized and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LTC6906I is guaranteed to meet specified performance from -40C to 85C. Note 8: Consult the Applications Information section for operation with supplies higher than 3.6V.
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LTC6906 TYPICAL PERFOR A CE CHARACTERISTICS
Typical Frequency Error vs Power Supply
0.50 0.40 0.30
2 1
FREQUENCY ERROR (%)
FREQUENCY ERROR (%)
0.20 0.10 0 -0.10 -0.20 -0.30 -0.40 RSET = 1M RSET = 100k
ERROR (%)
-0.50 2.25
3
4 SUPPLY VOLTAGE (V)
Typical Supply Current vs Frequency
90 80
POWER SUPPLY CURRENT (A)
CL = 5pF TA = 25C
POWER SUPPLY CURRENT (A)
70 60 50 40 30 20 10 0 0 200
140 120 100 80 60 40 20 0 100kHz, 2.25V 0 20 10 30 LOAD CAPACITANCE (pF) 40
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SET PIN VOLTAGE (V)
V+ = 3.6V
V
+ = 2.25V
400 600 800 FREQUENCY (kHz)
Typical Supply Current vs Temperature, 1MHz
90 CL = 5pF 85
SUPPLY CURRENT (A) 18
80 75 70 65 60 55 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C)
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SUPPLY CURRENT (A)
4
UW
5
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Typical Frequency Error vs Temperature
0.50 0.40
Typical Frequency Error vs RSET
RSET = 100k 0 3.6V -1 3.6V -2 -3 -4 RSET = 1M
2.25V
0.30 0.20
2.25V
0.10 0
V+ = 2.25V V+ = 5V
-0.10
-0.20 -0.30 -0.40 -0.50 0 200 400 600 800 RSET (k) 1000 1200
-5 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
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Typical Supply Current vs Load Capacitance
200 180 160 TA = 25C 1MHz, 3.6V
0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35
VSET vs Temperature (VSET is the Voltage Measured at the RSET Pin)
RSET = 100k
1MHz, 2.25V
VSET AT V+ = 3.6V
VSET AT V+ = 2.25V
100kHz, 3.6V
1000
1200
0.30 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C)
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Typical Supply Current vs Temperature, 100kHz
17 16 15 14 13 12 11 10 9 8 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C)
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CL = 5pF
ISUPPLY
AT V+ = 3.6V
ISUPPLY AT V+ = 3.6V
ISUPPLY AT V+ = 2.25V
ISUPPLY AT V+ = 2.25V
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or better temperature coefficient. For lower accuracy applications, an inexpensive 1% thick-film resistor may be used. Limit the capacitance in parallel with RSET to less than 10pF to reduce jitter and to ensure stability. Capacitance greater than 10pF could cause the LTC6906 internal feedback circuits to oscillate. The voltage on the SET pin is approximately 650mV and decreases with temperature by about -2.2mV/C. GRD (Pin 5): Guard Signal. This pin can be used to reduce PC board leakage across the frequency setting resistor, RSET. The GRD pin is held within a few millivolts of the SET pin and shunts leakage current away from the SET pin. To control leakage, connect a bare copper trace (a trace with no solder mask) to GRD and loop it around the SET pin and all PC board metal connected to SET. V+ (Pin 6): Voltage Supply (2.25V to 3.6V). This supply is internally decoupled with a 20 resistor in series with an 800pF capacitor. No external decoupling capacitor is required for OUT pin loads less than 50pF. V+ should be kept reasonably free of noise and ripple.
PI FU CTIO S
OUT (Pin 1): Oscillator Output. The OUT pin swings from GND to V+ with an output resistance of approximately 150. For micropower operation, the load resistance must be kept as high as possible and the load capacitance as low as possible. GND (Pin 2): Ground. DIV (Pin 3): Divider Setting Input. This three-level input selects one of three internal digital divider settings, determining the value of N in the frequency equation. Tie to GND for /1, leave floating for /3 and tie to V+ for /10. When left floating, the LTC6906 pulls Pin 3 to mid-supply with a 2.5M resistor. When Pin 3 is floating, care should be taken to reduce coupling from the OUT pin and its trace to Pin 3. Coupling can be reduced by increasing the physical space between traces or by shielding the DIV pin with grounded metal. SET (Pin 4): Frequency Setting Resistor Input. Connect a resistor, RSET, from this pin to GND to set the oscillator frequency. For best performance use a precision metal- or thin-film resistor of 0.5% or better tolerance and 50ppm/C
BLOCK DIAGRA
DECOUPLING NETWORK 6 2 V+ 20 GND 800pF IFB
VSET VGRD 650mV VSET RSET 5 GRD 4 SET
ISET = IFB
BUFFER VSET
+
-
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FREQUENCY-TO-CURRENT CONVERTERS fOSC IFB THREE-LEVEL INPUT DETECTOR
V+ 5M DIV 5M DIVIDER SELECT 3
VSET
OP AMP
VOLTAGE CONTROLLED OSCILLATOR (MASTER OSCILLATOR) fOSC = 1MHz * 100k/RSET
fOSC PROGRAMMABLE DIVIDER (n) (/1, /3, /10)
150 DRIVER OUT 1
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LTC6906
TEST CIRCUIT
LTC6906 SUPPLY VOLTAGE V+ GND DIV OUT GRD SET RSET 0.01% 10ppm/C
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CTEST
EQUIVALENT CIRCUIT OF OSCILLOSCOPE OR FREQUENCY COUNTER PROBE
CPROBE
RPROBE 10M
CTEST = 1/(1/5pF - 1/CPROBE) = 7.5pF FOR A 15pF SCOPE PROBE
Figure 1. Test Circuit with 5pF Effective Load
EQUIVALE T I PUT A D OUTPUT CIRCUITS
6 V+ 6 20 4 800pF 2 GND
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Figure 2. V + Pin
6
V+ 5M
3
DIV 5M
2
GND
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Figure 5. DIV Pin
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V+
6 1k 5
V+ 200 TOTAL OUTPUT RESISTANCE
SET
GRD
2
GND
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GND
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Figure 3. SET Pin
Figure 4. GRD Pin
6
V+ fOUT
1
OUT
300
2
GND
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Figure 6. OUT Pin
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THEORY OF OPERATIO
The LTC6906 is a precision, resistor programmable oscillator (see Block Diagram). It generates a square wave at the OUT pin with a period directly proportional to the value of an external resistor, RSET. A feedback circuit measures and controls the oscillator frequency to achieve the highest possible accuracy. In equilibrum, this circuit ensures that the current in the SET pin, ISET, is balanced by IFB. IFB is proportional to the master oscillator frequency, so we have the relationship: ISET = IFB = VSET * OSC * COSC Where COSC is a precision internal capacitor: COSC = 10pF for the LTC6906 Solving for the oscillator period:
tOSC = 1 OSC = VSET * COSC ISET
tOSC =
1 OSC
= RSET * COSC
(4)
The period and frequency are determined exclusively by RSET and the precision internal capacitor. Importantly, the value of VSET is immaterial, and the LTC6906 maintains its accuracy even though VSET is not a precision reference voltage. The digital dividers shown in the Block Diagram further divide the master oscillator frequency by 1, 3 or 10 producing: OUT = OSC N (5)
(1)
(2)
and tOUT = N * tOSC (6) Table 1 gives specific frequency and period equations for the LTC6906. The Applications Information section gives further detail and discusses alternative ways of setting the LTC6906 output frequency.
This is the fundamental equation for the LTC6906. It holds regardless of how the SET pin is driven. When a resistor, RSET, is connected from the SET pin to ground, we have the relationship:
VSET = RSET ISET
Table 1. Output Frequency Equations
PART NUMBER LTC6906 FREQUENCY OUT = 1MHz N 100k * RSET
(3)
PERIOD
DIVIDER RATIOS 10, DIV Pin = V + N = 3, DIV Pin = Open 1, DIV Pin = GND
R tOUT = N * 1s * SET 100k
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Selecting RSET and the Divider Ratio
APPLICATIO S I FOR ATIO
The LTC6906 contains a master oscillator followed by a digital divider (see Block Diagram). RSET determines the master oscillator frequency and the DIV pin sets the divider ratio, N. The range of frequencies accessible in each divider ratio overlap, as shown in Figure 7. This figure is derived from the equations in Table 1. For any given frequency, power can be minimized by minimizing the master oscillator frequency. This implies maximizing RSET and using the lowest possible divider ratio, N. The relationship between RSET, N and the unloaded power consumption is shown in Figure 8, where we can clearly see that supply current decreases for large values of RSET. For a discussion of jitter and divide ratio, refer to page 11. Minimizing Power Consumption
RSET (k)
ISUPPLY (A)
The supply current of the LTC6906 has four current components: * Constant (Independent V+, OUT and CLOAD) * Proportional to ISET (which is the current in RSET) * Proportional to V+, OUT and CLOAD * Proportional to V+ and RLOAD An approximate expression for the total supply current is:
I+ 5A + 6 * ISET + V + * OUT * (CLOAD + 5pF ) + 5A + 6 * V+ 2 * RLOAD V+
VSET + V + * OUT * (CLOAD + 5pF ) + 2 * RLOAD RSET
VSET is approximately 650mV at 25C, but varies with temperature. This behavior is shown in the Typical Performance Characteristics. Power can be minimized by maximizing RSET, minimizing the load on the OUT pin and operating at lower frequencies. Figure 9 shows total supply current vs frequency
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10000 1000 /10 /3 /1 100 10 1 10 100 1000 OUTPUT FREQUENCY (kHz) 10000
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Figure 7. RSET vs Desired Output Frequency (LTC6906)
80 70 60 50 40 30 20 10 0 100 RSET (k)
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CLOAD = 0 V+ = 3V TA = 25C
1000
Figure 8. Unloaded Supply Current vs RSET
under typical conditions. Below 100kHz the load current is negligible for the 5pF load shown. Guarding Against PC Board Leakage The LTC6906 uses relatively large resistance values for RSET to minimize power consumption. For RSET = 1M, the SET pin current is typically only 6.5A. Thus, only 6.5nA leaking into the SET pin causes a 0.1% frequency error. Similarly, 1G of leakage resistance across RSET (1000 * RSET) causes the same 0.1% error.
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Bypassing the Power Supply
/1 /3
APPLICATIO S I FOR ATIO
80 70
POWER SUPPLY CURRENT (A)
V+ = 2.7V
60 50 40 30 20 10 0 0
/10
400 600 200 800 1000 1200 MASTER OSCILLATOR FREQUENCY (kHz)
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Figure 9. Supply Current vs Frequency
Achieving the highest accuracy requires controlling potential leakage paths. PC board leakage is aggravated by both dirt and moisture. Effective cleaning is a good first step to minimizing leakage, and some PC board manufacturers offer high impedance or low leakage processing options. Another effective method for controlling leakage is to shunt the leakage current away from the sensitive node through a low impedance path. The LTC6906 provides a signal on the GRD pin for this purpose. Figure 10 shows a PC board layout that uses the GRD pin and a "guard ring" to absorb leakage currents. The guard ring surrounds the SET pin and the end of RSET to which it is connected. The guard ring must have no solder mask covering it to be effective. The GRD pin voltage is held within a few millivolts of the SET pin voltage, so any leakage path between the SET pin and the guard ring generates no leakage current.
LTC6906 1 OUT V+ GRD 2 GND 5 GUARD RING 6 NO SOLDER MASK OVER THE GUARD RING
3
DIV RSET
SET
4
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Figure 10. PC Board Layout with Guard Ring
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The LTC6906 has on-chip power supply decoupling that eliminates the need for an external decoupling capacitor in most cases. Figure 11 shows a simplified equivalent circuit of the output driver and on-chip decoupling network. When the output driver switches from low to high, the 800pF capacitor delivers the current needed to charge the off-chip capacitive load. Within nanoseconds the system power supply recharges the 800pF capacitor.
V+ LTC6906-1 fOUT 1 CLOAD 2 GND ESD DIODES DRIVER DECOUPLING NETWORK
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V+
6
20
OUT
300 800pF
Figure 11. Simplified Equivalent of the Output Driver and On-Chip Decoupling Circuit
Figure 12 shows a test circuit for evaluating performance of the LTC6906 with a highly inductive, 330nH power supply. Figure 13 shows the effectiveness of the on-chip decoupling network. For CLOAD = 5pF to 50pF, the output waveforms remain well formed. The extremely low supply current of the LTC6906 allows operation with substantial resistance in the power supply. Figure 14 shows a test circuit for evaluating performance of the LTC6906 with a highly resistive, 100 power supply. Figure 15 shows the effectiveness of the on-chip decoupling network. For CLOAD = 5pF to 50pF, the output waveforms remain well formed. With a 50pF load, a very small (2.5%) slow tail can be seen on the rising edge. The output waveform is still well formed even in this case. The ability of the LTC6906 to operate with a resistive supply permits supplying power via a CMOS logic gate or microcontroller pin. Since the LTC6906 has a turn-on time of less than 200sec, this technique can be used to enable the device only when needed and further reduce power consumption.
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LEAKAGE CURRENT
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3.3V RS 100 LTC6906 V+ GND DIV OUT GRD SET RSET 100k
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APPLICATIO S I FOR ATIO
LS 330nH 3.3V LTC6906 V+ GND DIV OUT GRD SET RSET 100k
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Figure 12. Test Circuit with an Inductive Power Supply
3.5 3
VOUT (V)
VOUT (V)
2
1
CLOAD = 5pF CLOAD = 10pF CLOAD = 20pF CLOAD = 50pF 4.75 4.95 4.85 TIME (s) 5.05 5.15
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Figure 13. Output Waveforms with an Inductive Supply (See Figure 12)
Start-Up Time When the LTC6906 is powered up, it holds the OUT pin low. After the master oscillator has settled, the OUT pin is enabled and the first output cycle is guaranteed to be within specification. The time from power-up to the first output transition is given approximately by: tSTART 64 * tOSC + 100s The digital divider ratio, N, does not affect the start-up time. Power Supply Rejection The LTC6906 has a very low supply voltage coefficient, meaning that the output frequency is nearly insensitive to the DC power supply voltage. In most cases, this error term can be neglected. High frequency noise on the power supply (V+) pin has the potential to interfere with the LTC6906's master oscillator.
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CLOAD
Figure 14. Test Circuit with a Resistive Power Supply
3.5 3
2
1
CLOAD = 5pF CLOAD = 10pF CLOAD = 20pF CLOAD = 50pF 0.5 0.6 0.7 0.8 TIME (s) 0.9 1.0 1.1
0 0.4
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Figure 15. Output Waveforms with a Resistive Supply (See Figure 14)
Periodic noise, such as that generated by a switching power supply, can shift the output frequency or increase jitter. The risk increases when the fundamental frequency or harmonics of the noise fall near the master oscillator frequency. It is relatively easy to filter the LTC6906 power supply because of the very low supply current. For example, an RC filter with R = 160 and C = 10F provides a 100Hz lowpass filter while dropping the supply voltage only about 10mV. Operating the LTC6906 with Supplies Higher Than 3.6V The LTC6906 may also be used with supply voltages between 3.6V and 5.5V under very specific conditions. To ensure proper functioning above 3.6V, a filter circuit must be attached to the power supply and located within 1cm of the device. A simple RC filter consisting of a 100 resistor and 1F capacitor (Figure 16) will ensure that supply resonance at higher supply voltages does not induce
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Performance graphs. VSET changes approximately -2.3mV/ C. At room temperature VSET increases 18mV/octave or 60mV/decade of increase in ISET. If the SET pin is driven with a current source generating ISET, the oscillator output frequency will be: ISET 10pF OSC ISET 25.9mV * n - 2.3mV / C -18 A 82 * 10 Figure 17 and Figure 18 show a current controlled oscillator and a voltage controlled oscillator. These circuits are not highly accurate if used alone, but can be very useful if they are enclosed in an overall feedback circuit such as a phase-locked loop.
LTC6906 V+ V+ GND DIV OUT GRD SET ICTRL 0.65A TO 6.5A
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APPLICATIO S I FOR ATIO
unpredictable oscillator behavior. Accuracy under higher supplies may be estimated from the typical Frequency vs Supply Voltage curves in the Typical Performance Characteristics section of this data sheet.
V+ 3.6V TO 5.5V DC 100 V 1F LTC6906
+
OUT GRD SET RSET
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GND DIV
Figure 16. Using the LTC6906 at Higher Supply Voltages
Alternative Methods for Setting the Output Frequency Any means of sinking current from the SET pin will control the output frequency of the LTC6906. Equation 2 (repeated below) gives the fundamental relationship between frequency and the SET pin voltage and current:
tOSC =
1 OSC
V = SET * 10pF ISET
This equation shows that the LTC6906 converts conductance (ISET/VSET) to frequency or, equivalently, converts resistance (RSET = VSET/ISET) to period. VSET is the voltage across an internal diode, and as such it is given approximately by: VSET VT * Loge ISET IS
ISET 25.9mV * Loge - 2.3mV/ C 82 * 10 -18 A where VT = kT/q = 25.9mV at T = 300K (27C) IS 82 * 10-18 Amps (IS is also temperature dependent) VSET varies with temperature and the SET pin current. The response of VSET to temperature is shown in the Typical
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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100kHz TO 1MHz
(2)
Figure 17. Current Controlled Oscillator
LTC6906 V+ V+ GND DIV OUT GRD SET
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1MHz TO 100kHz
RSET 100k
VCTRL 0V TO 0.585V
Figure 18. Voltage Controlled Oscillator
Jitter and Divide Ratio At a given output frequency, a higher master oscillator frequency and a higher divide ratio will result in lower jitter and higher power supply dissipation. Indeterminate jitter percentage will decrease by a factor of slightly less than the square root of the divider ratio, while determinate jitter will not be similarly attenuated. Please consult the specification tables for typical jitter at various divider ratios.
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LTC6906
TYPICAL APPLICATIO S
Setting Frequency to 0.1% Resolution with Standard Resistors
LTC6906 2.25V TO 3.6V /10 /3 /1 V
+
10kHz TO 1MHz
LTC6906 2.25V TO 3.6V V+ GND OUT GRD SET
OUT GRD SET RA RA < RB/10 1% THIN FILM RB 100k TO 1M 0.1% THIN FILM
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GND DIV
PACKAGE DESCRIPTIO
0.62 MAX
0.95 REF
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING
RELATED PARTS
PART NUMBER LTC1799 LTC6900 LTC6902 LTC6903/LTC6904 LTC6905 DESCRIPTION 1kHz to 33MHz ThinSOT Oscillator 1kHz to 20MHz ThinSOT Oscillator Multiphase Oscillator with Spread Spectrum Frequency Modulation 1kHz to 68MHz Serial Port Programmable Oscillator 17MHz to 170MHz ThinSOT Oscillator COMMENTS Single Output, Greater Frequency Range Single Output, Greater Frequency Range 2-, 3- or 4-Phase Outputs Very Wide Frequency Range with Digital Programmability Single Output, Higher Frequency
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
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U
Trimming the Frequency
1MHz WITH 2.5% RANGE
Sine Wave Oscillator
1MHz LTC6906 2.25V TO 3.6V V+ GND OUT GRD SET RSET 100k L1 100H C1 240pF
6906 TA05
0.1F 1k
DIV
RA 97.6k RB 5k
6906 TA04
DIV
S6 Package 6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC (NOTE 4)
1.22 REF
1.4 MIN
2.80 BSC
1.50 - 1.75 (NOTE 4) PIN ONE ID
0.95 BSC 0.80 - 0.90
0.30 - 0.45 6 PLCS (NOTE 3)
0.01 - 0.10
0.09 - 0.20 (NOTE 3)
1.90 BSC
S6 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
LT/LWI/LT 0705 REV A * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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